FIG. 1 is a schematic view 10 of a typical implementation of a converter/controller device 14 within a computer system platform 12. A central processing unit (CPU) 18, along with associated random access memory (RAM) 22, and read only memory (ROM) 24 are typically connected to other elements of the host system 12, through platform logic 20, to a bus architecture 26.
The platform logic 20 comprises bus interface logic and memory control logic, and is typically incorporated into one or two chips, called a “chipset”. In some cases, the chipset 20 is integrated within the CPU device 18. Typically, the chipset 20 further comprises the bus architecture 26, which comprises one or more bus interfaces 28a,28b,28c that are commonly used to connect additional platform components 16 to complete the desired function of the platform 12.
FIG. 1 also shows a conventional protocol converter/function controller 14, which is embedded on the computing system platform 12. The protocol converter/function controller device 14 communicates to the operating system and other software components associated with the CPU 18, through the bus architecture 26, using the first electrical interface 30 and first protocol 32, and communicates with one or more end functions 16, using a second protocol B 36 and electrical interface B 34.
The protocol converter and function controller device 14 is connected, by the first electrical interface A 30 and first protocol 32, to the platform logic 20 associated the CPU 18, through the bus architecture 26, comprising electrical signals on one or more of the bus interfaces 28a,28b,28c. 
The end function 16 of a component associated with or soldered to the platform 12 may be one of the many functions desirable by the user of the computer system platform 12. For example, the end function 16 may typically comprise a disk drive or other storage interface, a network interface, an audio or video user interface, a human input device interface, a data acquisition interface, or an alternate bus interface, which acts as a bridge or router. The end function 16 may alternately comprise a wireless connectivity endpoint. For end functions 16 which are embedded in the converter/controller device 14, the protocol B 36 and electrical interface B 34 may not be visible or accessible outside the converter/controller device 14.
The on-board converter/controller device 14 is connected through input/output terminals 15 to the bus interface 26, and provides function control and/or protocol conversion between the CPU 18 and one or more end functions 16. The converter/controller device 14 is a connected component within the platform 12, and comprises an additional component within the platform material list. The converter/controller device 14 is typically soldered to the platform 12, or mated to the platform bus interface through a bus interface-specific expansion connector, e.g. such as through a PCI bus slot.
The first electrical interface 30 is typically connected to one of the system bus interfaces 28, e.g. such as through bus interface X 28a, such that the operating system, device drivers, and other software components, which are typically executed from either RAM 22 or ROM 26, can identify the on-board converter/controller device 14, and load the appropriate device drivers.
The layer of software that interacts directly with hardware logic in the on-board converter/controller device 14 is the device driver. Device drivers use a device specific protocol to communicate with the on-board converter/controller device 14, which may be either an industry standard protocol, or a vendor-unique protocol, depending on the design of the protocol support logic 32 for the converter/controller device 14. The supported protocols are typically indicated to the operating system, to when the operating system detects the device presence in the system bus interface 26, such as through plug and play mechanisms.
The on-board converter/controller device 14, as shown in FIG. 1, includes an embedded microprocessor 38, which provides conventional electrical and/or protocol conversion, within the converter/controller device 14. Similarly, alternate computer systems have previously provided microprocessor-less converter/controller designs, which interface from a first protocol 32 and electrical interface 30 to a second protocol 36 and electrical interface 34, e.g. such as by performing protocol conversion in state machines and logic elements integrated in the converter/controller device 14.
The first electrical interface A 30 typically comprises a state machine, which controls the bus interface specific signals used to transmit and receive data elements. For example, electrical interface A may handle raw data transfer over PCI, ISA, USB, IEEE1394, PCMCIA, RS232-UART, 3GIO (PCI Express), SPI, MultiMediaCard (MMC), SmartMedia, SD Memory Card, SDIO, Memory Stick, ISO7816 (Smart Card), Serial ATA, Parallel Port, IDE, or any other wired bus interface 26. The first electrical interface A 30 may also handle raw data transfer over wireless interfaces such as through BLUETOOTH™ technology, as defined by Bluetooth Special Interest Group (SIG). A wireless first electrical interface A 30 typically comprises transceiver circuitry being capable of transmitting and receiving raw data over the bus interface, including any wireless transceiver components that may be necessary. The first protocol A support logic 32 comprises the method by which raw data transferred through the first electrical interface A 30. The protocol support logic 32 typically includes a set of registers and that communicate information about raw data elements, such as the source of the data, the destination of the data, and the format of the data. The protocol support logic 32 may include methods that manipulate raw data, e.g. such as performing cryptographic functions upon the raw data. The protocol A support logic 32 may be simply a data buffer large enough to contain both raw data and the information about the raw data. Protocol A 32 can be any protocol or combination of protocols that gives meaning to raw data that is sourced from or destined to the end function 16, e.g. such as ATA/ATAPI, SBP-2, and/or TCP/IP. The protocol A support logic 32 in FIG. 1 represents all hardware state machines, logic elements, and data buffering implemented in the converter/controller device 14 which support these protocols.
The second end function protocol support logic 36 provides hardware elements necessary to support the protocols which give meaning to raw data elements transmitted and received using the second electrical interface 34. Protocol B may be a standardized protocol for communicating with the end function 16, or it may be specific to the end function. For example, protocol B for a converter/controller device used to connect Memory Stick cards to platform 12 is specified in the Memory Stick Standard. In this example, the electrical interface B 34 is also specified in the Memory Stick Standard.
The embedded microprocessor 38, within the controller 14, has dedicated firmware program ROM 40 and data ROM 42. The embedded microprocessor 38 typically receives commands within 1394-SBP2 protocol 32, and converts the commands to USB storage device class bulk transfer protocol 36.
A general purpose USB-based function controller 14, such as Part No. TUSB3210, available through Texas Instruments, Inc., is one example of an embedded micro-processor function controller 14. As seen in FIG. 1, firmware ROM 40 and data RAM 42 are associated with the embedded micro-processor 38. The TUSB3210 device 14 comprises an integrated 8052 core microprocessor 38, and several RAM and ROM components 40,42.
Microsoft Corp., Small Form-Factor I/O Devices for Windows, describes conventional protocol conversion through embedded microprocessors. Electrical conversion and USB mass storage control are typically achieved with such embedded micro-controller designs, such as with a TUSB3210 function controller 14.
The embedded microcontroller, i.e. microprocessor, 38 is a peripheral device to the CPU 18, which offloads CPU instructions to provide dedicated protocol conversion. However, while the peripheral microcontroller 38 offloads such tasks from the CPU 18, there is a substantial cost and complexity associated with a peripheral microprocessor 38.
In alternate prior system platforms, in which the microprocessor 38 is embedded within the system 18,20, the embedded microprocessor 38 is still a discrete device, having a similar design to a peripheral processor 38, and similarly off-loads processing tasks from the CPU 18.
While prior art protocol conversion has provided an increase in overall system speed, for earlier CPUs 18 having limited processing capabilities, current CPUs 18, such as Intel Pentium 4™ microprocessors 18, provide substantially more processing capabilities than earlier microprocessors 18, such that there is often a surplus of processing capacity.
The converter controller 14 shown in FIG. 1 comprises an embedded microprocessor 38 to provide protocol conversion. In alternate converters/controllers 14 without an embedded microprocessor 38, the design complexity is directly related to the complexity of the protocol conversion tasks. In addition, such microprocessor-less converter/controllers 14 rely on hardware state machines and logic which are typically not upgradeable to support new protocols or electrical interface changes. For simple converter/controller devices, this type of microprocessor-less architecture may be sufficient.
It would be advantageous to perform efficient protocol conversion for a computing system platform, such that conversion and control processing is performed in a cost and time efficient manner. It would also be advantageous to perform protocol conversion for a computing system platform, such that conversion and control processing is offloaded to the central processing unit.
Microprocessor-based devices, such as desktop computers, laptop computers, personal digital assistants (PDAs), and/or mobile phones often comprise a connection to flash media, such as to a Memory Stick™, to a SmartMedia™ card, or to MMC/SD media. Flash media is typically installed within a flash media port, either directly into the microprocessor device, or through an intermediate adapter, having a socket connector. Card detect (CD) signals are very common in socket connectors, to indicate to the system when a card, e.g. such as a Memory Stick™ card, by Sony Electric Co., Inc., has been inserted. For common flash media connectors, the card detect signals, e.g. CD#, are typically active low.
FIG. 2 shows a media adapter system 50 adapted to receive different flash media 60a, 60b, 60c, 60d having different formats. A dedicated Memory Stick™ passive adapter 58a comprises a socket connector 68a to establish contact with corresponding contacts on the Memory Stick™ 60a, and further comprises host, i.e. system, connections 66a to establish contact with a PC card controller 54 through corresponding contacts, such as through a card bay socket interface 56. Similarly, a dedicated SmartMedia passive adapter 58b comprises a socket connector 68b to establish contact with corresponding contacts on the SmartMedia card 60b, and further comprises host connections 66b to establish contact with a PC card controller 54 through a corresponding contact interface 56.
In FIG. 2, an MMC/SD passive adapter 58c comprises a 2-in-1 socket connector 68c, to establish contact with corresponding contacts on either an MMC card 60c or an SD card 60d, and further comprises host connections 66c to establish contact with a PC card controller 54 through corresponding contacts. Since there are only slight differences in the form factor and required software between an MMC card 60c and an SD card 60d, some passive adapters 58c can provide connections to either an MMC card 60c, or to an SD card 60d, without a query process to distinguish the type of connected media card 60c,60d. The functional extensions of SD cards 60d beyond MMC capabilities are provided by a shared protocol which comprises responses from the media in response to requests from the host 52.
Therefore, the PC card controller 54 supports a single flash media 60 through a dedicated passive adapter 58. For example, the PC card controller 54 shown in FIG. 2 supports Memory Stick™ flash media 60a through a Memory Stick™ passive adapter 68a, SmartMedia™ flash media 60b through a SmartMedia™ passive adapter 68b, and either MMC media 60c or SD flash media 60d through a MMC/SD passive adapter 68c. 
As seen in FIG. 2, the PC card controller 54 typically supports a single type of flash media 60, e.g. 60a, through a passive adapter 58, e.g. 58a, except for media types that share a command electrical interface, such as for MultiMedia Cards 60c and SD cards 60d. 
In the prior art, a signal, e.g. such as an MC_CD# signal, is used to identify when a flash media card 60 is inserted into a dedicated, i.e. format specific, passive adapter 58. While a query mechanism is sometimes used to identify which type of flash media 60 is supported by a connected passive adapter 60, e.g. for a SmartMedia™ adapter 58b, such a query process only provides query values that correspond to a single media type, e.g. corresponding to a SmartMedia™ card 60b and a SmartMedia™ adapter 58b. 
While an adapter system 50 as seen in FIG. 2 can be used to interface with flash media 60 having different formats, dedicated adapters 58 are used to interface with flash media 60 respectively. A user who desires to alternatively connect more than one flash media 60, i.e. having different command interfaces, to a host system 12, through a PC Card socket 46, is therefore required to acquire and use multiple passive adapters 58.
While the media adapter system shown in FIG. 2 may provide a query process to conform the type of flash media 60, e.g. 60a, supported by a connected passive adapter 58, such as 58a, such a process is limited to activate only one flash media interface at any time.
After the media 60 has been inserted into the adapter 58, and the MC_CD# signal is asserted, and a SQRYDR signal is typically driven by the PC card controller 54. The SQRYDR signal is used as a voltage source during the query process. After the SQRYDR signal is activated, the SQRYx signals can be read. Therefore, the SQRYx signals are only read one time per MC_CD# assertion. Since there is only one MC_CD# signal in the system 10 shown in FIG. 2, the architecture is limited in that one notification is given that a card is inserted into a passive adapter, with card detect signals that independently notify the host system when cards are plugged into the corresponding sockets. Therefore, only one flash media electrical interface can be activated through the passive adapter 58 at any time.
It would be advantageous to provide card bay architecture which supports a passive adapter that interfaces with multiple flash media types, and provides both card insertion and multiple media format determination. It would also be advantageous to provide a 3-in-1 connector for SD Card, Multimedia™ Card, and SmartMedia™ interfaces.
Furthermore, it would be advantageous to provide a PC card controller which integrates flash media reader technology. Such a system would be a major technological breakthrough. It would also be advantageous to provide a PC card controller which integrates flash media reader technology, which supports a flash media adapter comprising passive componentry. Furthermore, it would be advantageous to provide an PC card controller which integrates flash media reader technology in conjunction with a flash media adapter comprising passive componentry, to minimize the cost of the flash media adapter. Such a system would be a further technological breakthrough.
It would also be advantageous to provide a query process which corresponds with flash media type, in conjunction with a passive adapter that supports more than one type of media, such as by connecting typical CD# signals to SQR5:3 signals (FIG. 10), to indicate the type of media in the socket of a passive adapter.
Socket connectors, such as Yamaichi Series No. FRS001 connectors, provide a 2-in-1 card bay connection to both SmartMedia card 60b and to an SD card 60c. However, while other cards 20, such as MMC cards 60c may physically be inserted into the card socket 28 of such an adapter, an MMC card 60c may become stuck within the card socket. Such adapter connectors are therefore typically sold as 2-in-1 connectors, such that connection to an MMC card 60c is not supported by the adapter. While such adapter connectors are often provided with documentation and/or labeling to warn users that the adapter does not support an MMC card 60c, a user may still mistakenly attempt to connect an MMC card 60c to a host system through such a connector.
It would therefore be advantageous to provide an adapter connector to properly connect MMC flash 60c, in addition to cards having other formats, e.g. such as Memory Stick media 20a, SmartMedia™ 60b, and/or SD cards 60c. The development of such an adapter connector would constitute a major technological advance.